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AELK2004 | Digital Electronics | 2+1+0 | ECTS:2 | Year / Semester | Spring Semester | Level of Course | Short Cycle | Status | Compulsory | Department | DEPARTMENT of ELECTRICITY and ENERGY | Prerequisites and co-requisites | None | Mode of Delivery | Face to face, Group study, Lab work , Practical | Contact Hours | 14 weeks - 2 hours of lectures and 1 hour of practicals per week | Lecturer | Öğr. Gör. Volkan AYDIN | Co-Lecturer | Lecturer.Erhan SESLİ, Lecturer. Murat Küçükali | Language of instruction | Turkish | Professional practise ( internship ) | None | | The aim of the course: | This course aims that students are able to do operations and conversions between number systems. This course aims that students learn electrical characteristics of the logic gates, This course aims that students gain to ability design of the combined and sequentialand design sequential logic circuits. |
Learning Outcomes | CTPO | TOA | Upon successful completion of the course, the students will be able to : | | | LO - 1 : | Students can recognize Number systems and do conversion between number systems. Students can recognize code systems generated by Number systems and do application in related field. | 2,4,5 | 1, | LO - 2 : | Students can recognize Logic Gates, create the electrical circuit equivalents and analyze electrical circuit equivalents .Students can perform Logic gates and draw given a logical expression. | 2,4,5 | 1, | LO - 3 : | Students know boolean mathematics rules and can make the simplification any logical expression . | 2,4,5 | 1, | LO - 4 : | Students know transferring Logical expressions to the truth table,place this truth table values in karnaugh maps, can make groupping in karnaugh maps and can write system outputs. | 2,4,5 | 1, | LO - 5 : | For a given sytem, Students can create truth table.After, Students can switch Karnaugh maps and , can make groupping in karnaugh maps and can write The most simple version of system. | 2,4,5 | 1, | LO - 6 : | Students know The encoder and decoder circuits, and can know and implement those circuits. | 2,4,5 | 1, | LO - 7 : | Students know Summing, Substractor, Multiply and Comparator circuits and implement those circuits. | 2,4,5 | 1, | CTPO : Contribution to programme outcomes, TOA :Type of assessment (1: written exam, 2: Oral exam, 3: Homework assignment, 4: Laboratory exercise/exam, 5: Seminar / presentation, 6: Term paper), LO : Learning Outcome | |
Recognize Number systems,Eeach other to convert the number systems, Binary numbers arithmetic operations. Understanding code systems used in Digital Electronic circuits, and the Code Conversion to eachothers.Logic Integrated Structures. Logic gates: NOT, OR, NAND, NOR, XOR, XNOR Gates. All logic gates with truth tables. Electrical circuit representation and analysis of all logic gates. Establish digital electronic circuits.Boolean mathematics, simplification logical expressions and drawing using Boolean rules,Logical placement of expressions Karnaugh maps, Grouping process, obtain simplified the function using simplification. Ttwo, three, four and five variable Karnaugh maps investigation.Transferring logic problem of any field to logic language, establish the truth table, create Karnaugh maps and draw the most simple form of system outputs.Establishment of encoders and decoders circuits.The establishment of the Adder and Subtracter circuits: Half adder, Full adder, four -bit parallel full adder, half-Subtracter, four -bit Subtracter.The establishment of the comparator circuits,:Half- comparator, Full comparator and the four -bit parallel ( cascade ) comparator.Arithmetic Logic Unit structure, analysis and implementation. |
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Course Syllabus | Week | Subject | Related Notes / Files | Week 1 | Recognize Number systems, convert each number systems to other, binary number Summing, Subtraction, Multiplication and Division Operations. | | Week 2 | Recognize Number systems, convert each number systems to other, binary number Summing, Subtraction, Multiplication and Division Operations. | | Week 3 | Recognize Number systems, convert each number systems to other, binary number Summing,Subtraction, Multiplication and Division Operations. | | Week 4 | BCD Code, BCO Code, BCH Code, Excess-3 (3 Extra),Parity Code, Gray Codes and alphanumeric codes. | | Week 5 | BCD Code, BCO Code, BCH Code, Excess-3 (3 EXTRA),Parity Code, Gray Codes and alphanumeric codes. | | Week 6 | Integrated logic circuits, logic gates, mathematics principles, boolean mathematics rules, the simplification by boolean mathematıcs, truth tables, obtain logic gates from single type gates. | | Week 7 | Integrated logic circuits, logic gates, mathematics principles, boolean mathematics rules, the simplification by boolean mathematıcs, truth tables, obtain logic gates from single type gates. | | Week 8 | Karnaugh maps rules, karnaugh maps, various applications with karnaugh maps.
| | Week 9 | Midterm Exam. | | Week 10 | Karnaugh maps rules, karnaugh maps, various applications with karnaugh maps.
| | Week 11 | Code Converters, Encoders, Decoders, Multiplexer, Demultiplexer. | | Week 12 | Code Converters, Encoders, Decoders, Multiplexer, Demultiplexer. | | Week 13 | Addes,subtractors and multiplier circuits, comparators, arithmetic logic units. | | Week 14 | dders,subtractors and multiplier circuits, comparators, arithmetic logic units. | | Week 15 | Adders,subtractors and multiplier circuits, comparators, arithmetic logic units. | | Week 16 | Final Exam. | | |
1 | Ders Notları | | 2 | Digital Elektronik, Mavi Kitaplar, Metin Berekety,Engin Tekin | | |
1 | Mantık Devreleri, Değişim Yayınları, Prof.Dr.Hüseyin EKİZ | | |
Method of Assessment | Type of assessment | Week No | Date | Duration (hours) | Weight (%) | Mid-term exam | 9 | 17/04/2024 | 45 | 50 | End-of-term exam | 16 | 07/06/2024 | 45 | 50 | |
Student Work Load and its Distribution | Type of work | Duration (hours pw) | No of weeks / Number of activity | Hours in total per term | Yüz yüze eğitim | 2 | 14 | 28 | Sınıf dışı çalışma | 1 | 6 | 6 | Laboratuar çalışması | 2 | 3 | 6 | Arasınav için hazırlık | 1 | 6 | 6 | Arasınav | 1 | 1 | 1 | Kısa sınav | .5 | 4 | 2 | Dönem sonu sınavı için hazırlık | 2 | 5 | 10 | Dönem sonu sınavı | 1 | 1 | 1 | Total work load | | | 60 |
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