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BIL1007 | Computer Fundamentals | 3+0+0 | ECTS:6 | Year / Semester | Fall Semester | Level of Course | First Cycle | Status | Compulsory | Department | DEPARTMENT of COMPUTER ENGINEERING | Prerequisites and co-requisites | None | Mode of Delivery | Face to face | Contact Hours | 14 weeks - 3 hours of lectures per week | Lecturer | Prof. Dr. Mustafa ULUTAŞ | Co-Lecturer | None | Language of instruction | Turkish | Professional practise ( internship ) | None | | The aim of the course: | Provide basic knowledge on computer hardware and system software. |
Learning Outcomes | CTPO | TOA | Upon successful completion of the course, the students will be able to : | | | LO - 1 : | use any base to represent numbers and apply Boolean algebra in base two | 1,3,4 | 1 | LO - 2 : | perform arithmetic operations on binary numbers. | 1,3,4 | 1 | LO - 3 : | design digital circuits using logic gates. | 1,3,4 | 1 | LO - 4 : | analyze and design simple level-triggered and edge-triggered digital circuits. | 1,3,4 | 1 | LO - 5 : | understand and use Operating Systems. | 1,3,4 | 1 | CTPO : Contribution to programme outcomes, TOA :Type of assessment (1: written exam, 2: Oral exam, 3: Homework assignment, 4: Laboratory exercise/exam, 5: Seminar / presentation, 6: Term paper), LO : Learning Outcome | |
Advantages of digital systems, Digital representation of data, Bases other than ten, representation of whole and fractional numbers, Negative number representations, Fixed point arithmetic, Addition, subtraction, overfflow, Carry-Look-Ahead (CLA) addition, Floating Point representation, biased exponent, normalization, arithmetic operations on floating point representation, Logic gates, Boolean algebra, Simplification of functions by Boolean algebra and Karnaugh maps, Set-Reset (S-R) latch, S-R latch with gated-inputs, Data (D) latch, Clock mode digital circuits, D, J-K and T type flip-flops, Counters, dividers, shift-registers and memory circuits using flip-flops, Simplified computer architecture, Operating Systems (OS). |
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Course Syllabus | Week | Subject | Related Notes / Files | Week 1 | Analog quantities, Analog and digital systems, Binary digits and logic levels, Digital waveforms, Actual pulse definitions, Periodic Pulse Waveforms, Pulse definitions, Timing diagrams, Serial and parallel data
| | Week 2 | Basic logic functions, Basic system functions, Integrated circuits, Test and measurement instruments, Programmable logic, Decimal numbers, Binary numbers, Binary to decimal conversions | | Week 3 | Binary addition, Binary subtraction, 1's complement, 2's complement, Signed binary numbers, Floating point notation, Arithmetic operations with signed numbers, Hexadecimal numbers, Octal numbers | | Week 4 | BCD, Gray code, ASCII, Parity method, Cyclic Redundancy Check (CRC), Inverter, AND gate, OR gate, NAND gate | | Week 5 | NOR gate, XOR gate, XNOR gate, Fixed function logic, Programmable logic, Boolean addition, Boolean multiplication, Commutative law, Associative law | | Week 6 | Distributive law, Rules of Boolean algebra, DeMorgan's theorems, Boolean analysis of logic circuits, SOP and POS forms, SOP standard form, POS standard form, Karnaugh maps, Hardware Description Languages (HDLs) | | Week 7 | Combinational logic circuits, Exclusive-OR logic, Exclusive-NOR logic, Implementing combinational logic, Karnaugh map implementation, NAND logic, Universal gates, NOR logic, Pulsed waveforms | | Week 8 | Half-adder, Full-adder, Parallel adders, Comparators, Decoders, BCD decoder/driver, Encoders, Code converters, Multiplexers | | Week 9 | Midterm exam | | Week 10 | Demultiplexers, Parity generators/checkers, Latches, Flip-flops, Flip-flop characteristics, Flip-flop applications, One-shots, The 555 timer, Counting in binary | | Week 11 | 3-bit asynchronous counter, Propogation delay, Asynchronous decade counter, Asynchronous counter using D-flips-flops, The 74LS93A asynchronous counter, Synchronous counters, Analysis of sychronous counters, A 4-bit synchronous counter, BCD decade counter | | Week 12 | 4-bit synchronous binary counter IC, Up-down synchronous counters, Synchronous counter design, Cascaded counters, Counter decoding, Partial decoding, Resetting the counter with a decoder, Logic symbols, Basic shift register operations | | Week 13 | Serial-in serial-out shift registers, A basic application, The 74HC164A shift registers, Waveforms for the 74HC164A, Parallel-in serial-out shift registers, The 74HC165 shift registers, Bidirectional shift register, Universal shift register, Shift register counters | | Week 14 | Johnson counter, Ring counter, Shift register applications, Keyboard encoder, Memory units, Memory addressing, Read and write operations, Random Access Memory (RAM), Static RAM | | Week 15 | Asynchronous static RAM, Dynamic RAM (DRAM), Read Only Memory (ROM), PROM EPROM and EEPROM, Flash memory, Memory expansion, SIMMs and DIMMs, FIFO and LIFO, Magnetic hard drive, Optical storage | | Week 16 | Final exam | | |
1 | William, R., 2001, Computer System Architecture A Networking Approach, Addison Wessley, 659 p. | | |
1 | Sammes, T., Jenkinson B., 2007, Forensic Computing, A practitioner's Guide, Springer, 465 p. | | 2 | Murdocca, M., J,. Heuring V., P., 2000, Principles of Computer Architecture, Prentice-Hall, 553 p. | | |
Method of Assessment | Type of assessment | Week No | Date | Duration (hours) | Weight (%) | Mid-term exam | 8 | 10/12/2020 | 2 | 50 | End-of-term exam | 16 | 26/01/2021 | 2 | 50 | |
Student Work Load and its Distribution | Type of work | Duration (hours pw) | No of weeks / Number of activity | Hours in total per term | Yüz yüze eğitim | 3 | 14 | 42 | Sınıf dışı çalışma | 7 | 14 | 98 | Arasınav için hazırlık | 15 | 1 | 15 | Arasınav | 2 | 1 | 2 | Dönem sonu sınavı için hazırlık | 16 | 1 | 16 | Dönem sonu sınavı | 2 | 1 | 2 | Total work load | | | 175 |
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